1. Field
Example embodiments relate to system-on-chips (SOCs). For example, example embodiments relate to an SOC including a deepstop mode to reduce the total leakage current by conducting a power-off mode to a hard-macro block (e.g., core and intellectual property) incapable of using multi-threshold complementary metal-oxide-semiconductor (MTCMOS).
2. Description of Related Art
A conventional SOC includes an MTCMOS logic circuit having multiple threshold voltages, an MTCMOS control logic circuit for controlling the MTCMOS logic circuit, a real time clock circuit, and a hard-macro block (e.g., a core (CPU) or non-MTCMOS logic circuit).
The MTCMOS control logic circuit generates control signals for controlling the MTCMOS logic circuit in response to signals provided from a power manager and a time clock circuit, and provides the control signals to the MTCMOS logic circuit.
If a conventional SOC is operating in a stop mode, the MTCMOS logic circuit holds a data state of an input terminal in a condition just before entering the stop mode in response to the control signals generated from the MTCMOS control logic circuit and turns off N/PMOS transistors including N/PMOS transistors with higher threshold voltages per each cell, thereby reducing a leakage current. Therefore, a conventional SOC design scheme reduces a leakage current of the MTCMOS logic circuit, thereby decreasing the total power consumption.
If a conventional SOC switches to a normal mode from the stop mode, the MTCMOS logic circuit operates in the normal mode. In the normal mode, the MTCMOS logic circuit transfers data, which has been reserved in the stop mode, to blocks (e.g., the real time clock circuit, a hard-macro block, etc.). Namely, the MTCMOS logic circuit transfers input data to each block in the normal mode.
However, because the hard-macro block of a conventional SOC is fixedly constructed in a desired, or alternatively a predetermined hardware pattern through a fabrication process thereof, it is impossible to modify the circuit structure of the hard-macro block. Accordingly, the hard-macro block is harder to implement in the MTCMOS logic circuit, and a leakage current flows without limitation in the condition of supplying power to the hard-macro block. Therefore, if a conventional SOC is operating in the stop mode, the conventional SOC is unable to reduce a leakage current of the hard-macro block.